This webinar will discuss the results of NPL work on multilayer PCB reliability with particular emphasis on a range of factors that can reduce the time to failure after assembly. These will include via proximity, laminate materials, exclusion of non-functional pads, surface finish, PCB thickness, reflow profiles, micro-vias and z-axis thermal expansion. Details of an intercomparison between thermal cycling and interconnection stress testing will also be given.

Topics covered:

• PCB multilayer via reliability
• PCB board materials
• Non-functional pads, via aspect ratios
• Interconnection stress testing and thermal cycling
• Intermittent via location

The webinar will run from 14:30 hrs UK time (check local time in other countries here) - for between 45-60 minutes, and will include a Q&A session.

The NPL Electronics Interconnection (EI) Group is internationally recognised for its practical and innovative work on lead-free reliability, PCB interconnection failures, tin whisker mitigation and conformal coating research.